digital electronics Mcqs
1. NAND gates are preferred over others because these__________________?
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A. have lower fabrication area

B. consume least electronic power

C. can be used to make any gate

D. provide maximum density in a chip

2. Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins ?
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A. BGA

B. PGA

C. QFP

D. PLCC

3. The only function of NOT gate is to__________________?
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A. Stop signal

B. Invert input signal

C. None of the above

D. Act as a universal gate

4. In which of the following base systems is 123 not a valid number ?
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A. Base 16

B. Base 10

C. Base 3

D. Base8

5. (1(10101)2 is_______________?
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A. ( 69)10

B. (37)10

C. (41 )10

D. (5)10

6. When an input signal 1 is applied to a NOT gate, the output is ______________?
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A. Either 0 & 1

B. 0

C. None of the above

D. 1

7. The universal gate is ________________?
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A. NAND gate

B. OR gate

C. AND gate

D. None of the above

8. A debouncing circuit is________________?
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A. an astable MV

B. a bistable MV

C. a latch

D. a monostable MV

9. An AND gate will function as OR if________________?
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A. all the inputs to the gates are 1

B. all the inputs are 0

C. all the inputs and outputs are complemented

D. either of the inputs is 1

10. The inverter is _________________?
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A. one of the above

B. AND gate

C. NOT gate

D. OR gate

11. A NAND gate is called a universal logic element because______________?
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A. many digital computers use NAND gates

B. it is used by everybody

C. any logic function can be realized by NAND gates alone

D. all the minization techniques are applicable for optimum NAND gate realization

12. The number 1000 would appear just immediately after__________________?
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A. FFFF (hex)

B. 1111 (binary)

C. 7777 (octal)

D. All of the above

13. In Boolean algebra, the bar sign (-) indicates__________________?
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A. NOT operation

B. AND operation

C. None of the above

D. OR operation

14. The NOR gate is OR gate followed by____________________?
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A. None of the above

B. AND gate

C. NOT gate

D. NAND gate

15. The NAND gate is AND gate followed by_________________?
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A. None of the above

B. AND gate

C. OR gate

D. NOT gate
16. Digital circuit can be made by the repeated use of________________?
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A. NOT gates

B. OR gates

C. None of the above

D. NAND gates
17. The number of Boolean functions that can be generated by n variables is equal to_________________?
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A. 2n

B. 22 n

C. 2n-1

D. 2n

18. The fan put of a 7400 NAND gate is_______________?
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A. 10TTL

B. 8TTL

C. 5TTL

D. 2TTL

19. The binary number 10101 is equivalent to decimal number_________________?
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A. 21

B. 27

C. 12

D. 19

20. Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits ?
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A. State Evaluation

B. State Reduction

C. State Minimization

D. State Assignment
21. An OR gate has 6 inputs. The number of input words in its truth table are________________?
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A. 64

B. 6

C. 128

D. 32

22. Digital computers are more widely used as compared to analog computers, because they are______________?
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A. useful over wider ranges of problem types

B. easier to maintain

C. always more accurate and faster

D. less expensive

23. The binary code of (21.125)10 is_______________?
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A. 10101.01

B. 10100.111

C. 10100.001

D. 10101.001
24. In case of OR gate, no matter what the number of inputs, a____________________?
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A. 1 at any input causes the output to be at logic 1

B. 1 at any input causes the output to be at logic 0

C. 0 any input causes the output to be at logic 0

D. 0 at any input causes the output to be at logic 1

25. Excess-3 code is known as_________________?
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A. Algebraic code

B. Weighted code

C. Cyclic redundancy code

D. Self-complementing code
26. Consider the representation of six-bit numbers by twos complement, ones complement, or by sign and magnitude: In which representation is there overflow from the addition of the integers 011000 and 011000 ?
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A. All three representations

B. Twos complement and ones complement only

C. Sign and magnitude and ones complement only

D. Twos complement only

27. Indicate which of the following three binary additions are correct? 1.1011 + 1010 = 10101 II. 1010 + 1101 = 10111 ?
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A. I and II

B. II and III

C. . 1010 + 1101 = 11111

D. II and III

E. III only

28. What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA? A. Propagation delay will increase B. FPGA area will increase C. Wastage of logic modules will not be prevented D. Number of interconnected paths in device will decrease ?
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A. A & D

B. B & C

C. A & B

D. C & D

29. Which is the correct order of sequence for representing the input values in K-map ?
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A. (00, 01, 11, 10)

B. (00, 01, 10, 11)

C. (00, 10, 11, 01)

D. (00, 10, 01, 11)

30. What is the octal equivalent of the binary number : 10111101 ?
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A. 572

B. 573

C. 675

D. 275
31. What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view ?
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A. Bi-directional I/O pin access

B. Input operation

C. All of the above

D. Tristate output operation

32. Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is__________________?
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A. CMOS

B. ECL

C. TTLLS

D. TTLAS

33. The inputs of a NAND gate are connected together. The resulting circuit is _______________?
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A. None of the above

B. OR gate

C. NOT gate

D. AND gate

34. Positive logic in a logic circuit is one in which______________?
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A. logic 0 and 1 are represented by 0 and positive voltage respectively

B. logic 0 and, -1 are represented by negative and positive voltages respectively

C. logic 0 voltage level is higher than logic 1 voltage level

D. logic 0 voltage level is lower than logic 1 voltage level
35. Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is__________________?
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A. 12CPS

B. 120 CPS

C. 10 CPS

D. None of the above

36. Most of the digital computers do not have floating point hardware because_____________?
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A. of no specific reason.

B. floating point hardware is costly

C. it is slower than software

D. it is not possible to perform floating point addition by hardware