power electronics MCQs – Page 10

Practise focused power electronics questions with marked answers for exam preparation and subject revision.

power electronics Mcqs

181. A PNPN device having two gates is ___________?
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A. SUS

B. Diac

C. Triac

D. BCS

182. Gate circuit or triggering circuit of a thyristor is
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A. high power circuit.

B. may be low power or high power circuit

C. lower power circuit.

D. magnetic circuit.

183. SCR will be turned off when anode current is_______________?
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A. < latching current but greater than holding current and gate signal is 0.

B. less than holding current.

C. < latching current but greater than holding current and gate signal is present.

D. both (A) and (B).

184. The ability of an electronic system to function properly in its intended electromagnetic environment and should not be a source of pollution to that electromagnetic environment is known as____________?
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A. Interference

B. Susceptibility

C. Emission

D. Electromagnetic compatibility

185. In current commutated DC-DC choppers, the voltage spike appears across the load when_____________?
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A. Voltage across the commutating inductances collapses

B. The capacitance voltage adds to the supply voltage

C. Both A. and B.

D. None of these

186. In a lossless inverter, the average power absorbed in one period by the load must be__________?
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A. Equal to the average power supplied by the dc source

B. Greater than the average power supplied by the dc source

C. Equal to the average power supplied by the ac source

D. Lesser than the average power supplied by the dc source

187. The latching current of GTO should be of order
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A. 100 mA

B. 500 mA

C. 1:00 AM

D. 2:00 AM

188. Typical range of thyristor turn OFF time is______________?
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A. 3 10 s

B. 3 50 s

C. 3 500 s

D. 3 100 s

189. With increase in firing angle,
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A. Both harmonic distortion and quality of input current increases

B. Harmonic distortion increases and quality of input current decreases

C. Harmonic distortion decreases and quality of input current increases

D. Both harmonic distortion and quality of input current decreases

190. Which statement is true for latching current ___________?
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A. t is related to turn off process of the device.

B. It is related to conduction process of device.

C. It is related to turn on process of the device.

D. Both C and D.

191. Number of PN junction in an SCR is____________?
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A. Three

B. Four

C. Two

D. Five

192. During the commutation period in 3 phase converter, overlap time is_____________?
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A. Dependent on the load current

B. Dependent on the voltage

C. Dependent on both the load current and load voltage behind the short circuit current

D. Independent on both the load current and load voltage

193. In a single phase full wave rectifier, during blocking state the pea inverse voltage of diode is______________?
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A. V m / 2

B. 4 V m

C. V m

D. 2 V m

194. Which of following is not a power transistor?
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A. IGBTs

B. SITS

C. TRIAC

D. COOLMOS

195. In a three phase converter, the number of notches per cycle is____________?
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A. Six

B. One

C. Three

D. Nine

196. What may happen high dV / dt____________?
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A. Unwanted turn ON

B. Breakdown of J2 junction

C. Both A and B

D. Anyone of these

197. What is used to protect a thyristor from high di / dt conditions__________?
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A. Inductor

B. Fuse.

C. Voltage clamping device

D. Snubber circuit

198. Regulator sampling PWM is usually used in___________?
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A. High power inverters

B. Rectifiers

C. Low power inverters

D. Only A. and B.

199. Under normal operating condition voltage clamping device offers impedance of_________?
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A. high value.

B. low value.

C. moderate value.

D. zero value.

200. The maximum di/dt in a SCR is____________?
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A. Directly proportional to supply voltage

B. Directly proportional to inductance in the circuit

C. Inversely proportional to supply voltage

D. Both A and B

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